Complementary metal oxide semiconductor (CMOS) technology is the primary technology employed for ultra-large scale integrated (ULSI) circuits. Over the past decades, reduction in the size of CMOS transistors has been a principle focus of the microelectronics industry.
Transistors, such as metal oxide semiconductor field-effect transistors (MOSFETs), are generally either bulk semiconductor-type devices or silicon-on-insulator (SOI)-type devices. Most integrated circuits are fabricated in a CMOS process on a bulk semiconductor substrate.
In bulk semiconductor-type devices, transistors, such as MOSFETs, are built on top of the surface of a bulk substrate. The substrate is doped to form source and drain regions, and the conductive layer is provided between the source and drain regions. The conductive layer operates as a gate for the transistor, and the gate controls current in a channel between the surface and the drain regions. As transistors become smaller, the body thickness of the transistor (or thickness of the depletion layer below the inversion channel) must be scaled down to achieve superior short-channel performance.
In practice, the geometry of the gate and channel can become quite complicated. In one class of the device, a gate may be placed beneath the channel, as well as on top of the channel and its sides, to define a gate-all-around device, such as a gate-all-around MOSFET device. The gate-all-around configuration advantageously significantly increases the extent of the inversion layer.